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» Parallel Processing Architectures for Reconfigurable Systems
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JRTIP
2008
300views more  JRTIP 2008»
13 years 7 months ago
Real-time human action recognition on an embedded, reconfigurable video processing architecture
Abstract In recent years, automatic human action recognition has been widely researched within the computer vision and image processing communities. Here we propose a realtime, emb...
Hongying Meng, Michael Freeman, Nick Pears, Chris ...
ERSA
2009
107views Hardware» more  ERSA 2009»
13 years 5 months ago
Towards Effective Modeling and Programming Multi-core Tiled Reconfigurable Architectures
For a generic flexible efficient array antenna receiver platform a hierarchical reconfigurable tiled architecture has been proposed. The architecture provides a flexible reconfigur...
Kenneth C. Rovers, Marcel D. van de Burgwal, Jan K...
DAC
2008
ACM
14 years 8 months ago
A reconfigurable routing algorithm for a fault-tolerant 2D-Mesh Network-on-Chip
In this paper we present a reconfigurable routing algorithm for a 2D-Mesh Network-on-Chip (NoC) dedicated to faulttolerant, Massively Parallel Multi-Processors Systems on Chip (MP...
Zhen Zhang, Alain Greiner, Sami Taktak
ISCAS
2006
IEEE
154views Hardware» more  ISCAS 2006»
14 years 1 months ago
FleXilicon: a reconfigurable architecture for multimedia and wireless communications
— This paper proposes a new reconfigurable architecture for multi-media and wireless communications. The proposed architecture addresses three critical design issues with the loo...
Jong-Suk Lee, Dong Sam Ha
FCCM
2002
IEEE
171views VLSI» more  FCCM 2002»
14 years 18 days ago
Coarse-Grain Pipelining on Multiple FPGA Architectures
Reconfigurable systems, and in particular, FPGA-based custom computing machines, offer a unique opportunity to define application-specific architectures. These architectures offer...
Heidi E. Ziegler, Byoungro So, Mary W. Hall, Pedro...