Sciweavers

833 search results - page 4 / 167
» Parallel Processing Architectures for Reconfigurable Systems
Sort
View
TVLSI
2008
92views more  TVLSI 2008»
13 years 7 months ago
Reconfigurable Architecture for Network Flow Analysis
This paper describes a reconfigurable architecture based on field-programmable gate-array (FPGA) technology for monitoring and analyzing network traffic at increasingly high networ...
Sherif Yusuf, Wayne Luk, Morris Sloman, Naranker D...
ASPDAC
1995
ACM
116views Hardware» more  ASPDAC 1995»
13 years 11 months ago
A datapath synthesis system for the reconfigurable datapath architecture
Abstract — A datapath synthesis system (DPSS) for the reconfigurable datapath architecture (rDPA) is presented. The DPSS allows automatic mapping of high level descriptions onto...
Reiner W. Hartenstein, Rainer Kress
FCCM
2006
IEEE
170views VLSI» more  FCCM 2006»
13 years 11 months ago
An Architecture for Efficient Hardware Data Mining using Reconfigurable Computing Systems
The Apriori algorithm is a fundamental correlation-based data mining kernel used in a variety of fields. The innovation in this paper is a highly parallel custom architecture impl...
Zachary K. Baker, Viktor K. Prasanna
CASES
2001
ACM
13 years 11 months ago
A compiler framework for mapping applications to a coarse-grained reconfigurable computer architecture
The rapid growth of silicon densities has made it feasible to deploy reconfigurable hardware as a highly parallel computing platform. However, in most cases, the application needs...
Girish Venkataramani, Walid A. Najjar, Fadi J. Kur...
DAGSTUHL
2006
13 years 9 months ago
Reconfigurable Processing Units vs. Reconfigurable Interconnects
: In this paper we discuss different aspects of system reconfiguration and their relation to the specific requirements from the application domain. Two projects
Andreas Herkersdorf, Christopher Claus, Michael Me...