833 search results - page 84 / 167 » Parallel Processing Architectures for Reconfigurable Systems |
SC
1995
ACM
14 years 18 days ago
1995
ACM
The Convex SPP-1000 is the first commercial implementation of a new generation of scalable shared memory parallel computers with full cache coherence. It employs a hierarchical s...
FPGA
2004
ACM
14 years 2 months ago
2004
ACM
The simulation of large systems of biochemical reactions is a key part of research into molecular signaling and information processing in biological cells. However, it can be impr...
ISSS
2002
IEEE
14 years 2 months ago
2002
IEEE
We present a system-level design and programming method for embedded multiprocessor systems. The aim of the method is to improve the design time and design quality by providing a ...
ISSS
1999
IEEE
14 years 1 months ago
1999
IEEE
This paper describes a mechanism for automatic design and synthesis of very long instruction word (VLIW), and its generalization, explicitly parallel instruction computing rocesso...
ISCA
1998
IEEE
14 years 1 months ago
1998
IEEE
Alewife is a multiprocessor architecture that supports up to 512 processing nodes connected over a scalable and cost-effective mesh network at a constant cost per node. The MIT Al...