287 search results - page 32 / 58 » Parallel Skyline Computation on Multicore Architectures |
JPDC
2008
13 years 7 months ago
2008
Graphics processors (GPUs) provide a vast number of simple, data-parallel, deeply multithreaded cores and high memory bandwidths. GPU architectures are becoming increasingly progr...
ICS
2010
Tsinghua U.
13 years 6 months ago
2010
Tsinghua U.
Abstract—Power modeling based on performance monitoring counters (PMCs) has attracted the interest of many researchers since it become a quick approach to understand and analyse ...
DAC
2010
ACM
13 years 11 months ago
2010
ACM
We present a methodology for off-chip memory bandwidth minimization through application-driven L2 cache partitioning in multicore systems. A major challenge with multi-core system...
IISWC
2009
IEEE
14 years 2 months ago
2009
IEEE
—This paper presents and characterizes Rodinia, a benchmark suite for heterogeneous computing. To help architects study emerging platforms such as GPUs (Graphics Processing Units...
SBACPAD
2008
IEEE
14 years 2 months ago
2008
IEEE
Single processor technology has been evolving across last decades, but due to physical limitations of chip manufacturing process, the industry is pursuing alternatives to sustain ...