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ISCAS
2006
IEEE
111views Hardware» more  ISCAS 2006»
14 years 1 months ago
CMOS analog iterative decoders using margin propagation circuits
Abstract- Analog iterative decoders offer several advantages over their digital counterparts in terms of speed and power -A- log-MAP consumption. The current state of art CMOS anal...
S. Chakrabartty
IEEEPACT
2006
IEEE
14 years 1 months ago
Testing implementations of transactional memory
Transactional memory is an attractive design concept for scalable multiprocessors because it offers efficient lock-free synchronization and greatly simplifies parallel software....
Chaiyasit Manovit, Sudheendra Hangal, Hassan Chafi...
EVOW
2008
Springer
13 years 9 months ago
Analysis of Reconfigurable Logic Blocks for Evolvable Digital Architectures
Abstract. In this paper we propose three small instances of a reconfigurable circuit and analyze their properties using the brute force method and evolutionary algorithm. Although ...
Lukás Sekanina, Petr Mikusek
DATE
2003
IEEE
180views Hardware» more  DATE 2003»
14 years 20 days ago
Communication Centric Architectures for Turbo-Decoding on Embedded Multiprocessors
Software implementations of channel decoding algorithms are attractive for communication systems with their large variety of existing and emerging standards due to their flexibil...
Frank Gilbert, Michael J. Thul, Norbert Wehn
ICMCS
2008
IEEE
159views Multimedia» more  ICMCS 2008»
14 years 1 months ago
Using graphics devices in reverse: GPU-based Image Processing and Computer Vision
Graphics and vision are approximate inverses of each other: ordinarily Graphics Processing Units (GPUs) are used to convert “numbers into pictures” (i.e. computer graphics). I...
James Fung, Steve Mann