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SIPS
2006
IEEE
14 years 1 months ago
Partly Parallel Overlapped Sum-Product Decoder Architectures for Quasi-Cyclic LDPC Codes
Abstract— In this paper, we propose partly parallel architectures based on optimal overlapped sum-product (OSP) decoding. To ensure high throughput and hardware utilization effi...
Ning Chen, Yongmei Dai, Zhiyuan Yan
ASAP
2009
IEEE
142views Hardware» more  ASAP 2009»
14 years 4 months ago
Parallel Discrete Event Simulation of Molecular Dynamics Through Event-Based Decomposition
—Molecular dynamics simulation based on discrete event simulation (DMD) is emerging as an alternative to time-step driven molecular dynamics (MD). DMD uses simplified discretize...
Martin C. Herbordt, Md. Ashfaquzzaman Khan, Tony D...
VMV
2003
164views Visualization» more  VMV 2003»
13 years 8 months ago
A Parallel Framework for Silhouette-Based Human Motion Capture
This paper presents a method to capture human motion from silhouettes of a person in multi-view video streams. Applying a hierarchical kinematic body model motion parameters are e...
Christian Theobalt, Joel Carranza, Marcus A. Magno...
CARDIS
2000
Springer
124views Hardware» more  CARDIS 2000»
13 years 11 months ago
Elliptic Curve Cryptography on Smart Cards without Coprocessors
Abstract This contribution describes how an elliptic curve cryptosystem can be implemented on very low cost microprocessors with reasonable performance. We focus in this paper on t...
Adam D. Woodbury, Daniel V. Bailey, Christof Paar
DATE
2006
IEEE
219views Hardware» more  DATE 2006»
14 years 1 months ago
Low cost LDPC decoder for DVB-S2
Because of its excellent bit-error-rate performance, the Low-Density Parity-Check (LDPC) algorithm is gaining increased attention in communication standards and literature. The ne...
John Dielissen, Andries Hekstra, Vincent Berg