284 search results - page 18 / 57 » Parallel buffers for chip multiprocessors |
142
Voted
IPPS
2010
IEEE
15 years 1 months ago
2010
IEEE
In this paper, we study parallel I/O efficient graph algorithms in the Parallel External Memory (PEM) model, one of the private-cache chip multiprocessor (CMP) models. We study the...
124
Voted
HOTI
2008
IEEE
15 years 10 months ago
2008
IEEE
The Network-on-Chip (NoC) paradigm has emerged as a promising solution for providing connectivity among the increasing number of cores that get integrated into both systems-onchip...
143
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DAC
2008
ACM
15 years 5 months ago
2008
ACM
The problem attacked in this paper is one of automatically mapping an application onto a Network-on-Chip (NoC) based chip multiprocessor (CMP) architecture in a locality-aware fas...
172
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IEEEPACT
2009
IEEE
15 years 1 months ago
2009
IEEE
Resource sharing can cause unfair and unpredictable performance of concurrently executing applications in Chip-Multiprocessors (CMP). The shared last-level cache is one of the mos...
119
Voted
ICS
2009
Tsinghua U.
15 years 10 months ago
2009
Tsinghua U.
This paper proposes DCC (Dynamic Cache Clustering), a novel distributed cache management scheme for large-scale chip multiprocessors. Using DCC, a per-core cache cluster is compri...