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» Parallel simulation of chip-multiprocessor architectures
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MICRO
2007
IEEE
141views Hardware» more  MICRO 2007»
14 years 2 months ago
Composable Lightweight Processors
Modern chip multiprocessors (CMPs) are designed to exploit both instruction-level parallelism (ILP) within processors and thread-level parallelism (TLP) within and across processo...
Changkyu Kim, Simha Sethumadhavan, M. S. Govindan,...
CSC
2010
13 years 6 months ago
An Evaluation of Parallel Knapsack Algorithms on Multicore Architectures
Emergence of chip multiprocessor systems has dramatically increased the performance potential of computer systems. Since the amount of exploited parallelism is directly influenced ...
Hammad Rashid, Clara Novoa, Apan Qasem
DAMON
2006
Springer
14 years 3 days ago
Realizing parallelism in database operations: insights from a massively multithreaded architecture
A new trend in processor design is increased on-chip support for multithreading in the form of both chip multiprocessors and simultaneous multithreading. Recent research in databa...
John Cieslewicz, Jonathan W. Berry, Bruce Hendrick...
ISCA
2010
IEEE
176views Hardware» more  ISCA 2010»
14 years 23 days ago
Forwardflow: a scalable core for power-constrained CMPs
Chip Multiprocessors (CMPs) are now commodity hardware, but commoditization of parallel software remains elusive. In the near term, the current trend of increased coreper-socket c...
Dan Gibson, David A. Wood
LPNMR
2009
Springer
14 years 3 months ago
Application of ASP for Automatic Synthesis of Flexible Multiprocessor Systems from Parallel Programs
Configurable on chip multiprocessor systems combine advantages of task-level parallelism and the flexibility of field-programmable devices to customize architectures for paralle...
Harold Ishebabi, Philipp Mahr, Christophe Bobda, M...