Sciweavers

770 search results - page 24 / 154
» Parallel simulation of chip-multiprocessor architectures
Sort
View
ISCA
2007
IEEE
146views Hardware» more  ISCA 2007»
14 years 2 months ago
Virtual hierarchies to support server consolidation
Server consolidation is becoming an increasingly popular technique to manage and utilize systems. This paper develops CMP memory systems for server consolidation where most sharin...
Michael R. Marty, Mark D. Hill
MICRO
2006
IEEE
84views Hardware» more  MICRO 2006»
14 years 2 months ago
Reunion: Complexity-Effective Multicore Redundancy
To protect processor logic from soft errors, multicore redundant architectures execute two copies of a program on separate cores of a chip multiprocessor (CMP). Maintaining identi...
Jared C. Smolens, Brian T. Gold, Babak Falsafi, Ja...
IPPS
1998
IEEE
14 years 21 days ago
A Simulator for the Reconfigurable Mesh Architecture
Carsten Steckel, Martin Middendorf, Hossam A. ElGi...
DAC
1996
ACM
14 years 18 days ago
Symphony: A Simulation Backplane for Parallel Mixed-Mode Co-Simulation of VLSI Systems
In this paper we present an integrated simulation paradigm in which parallel mixed-mode co-simulation is accomplished by integrating sequential simulators in a software simulation ...
Antonio R. W. Todesco, Teresa H. Y. Meng
ICPP
2008
IEEE
14 years 2 months ago
A Scalable Architecture for Crowd Simulation: Implementing a Parallel Action Server
Crowd simulation can be considered as a special case of Virtual Environments where avatars are intelligent agents instead of user-driven entities. These applications require both ...
Guillermo Vigueras, Miguel Lozano, Carlos Perez, J...