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» Parallel simulation of chip-multiprocessor architectures
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179
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IPPS
1997
IEEE
15 years 7 months ago
DPF: A Data Parallel Fortran Benchmark Suite
We present the Data Parallel Fortran (DPF) benchmark suite, a set of data parallel Fortran codes forevaluatingdata parallel compilers appropriatefor any target parallel architectu...
Y. Charlie Hu, S. Lennart Johnsson, Dimitris Kehag...
PARLE
1993
15 years 7 months ago
On the Performance of Parallel Join Processing in Shared Nothing Database Systems
: Parallel database systems aim at providing high throughput for OLTP transactions as well as short response times for complex and data-intensive queries. Shared nothing systems re...
Robert Marek, Erhard Rahm
ICPP
2009
IEEE
15 years 10 months ago
End-to-End Study of Parallel Volume Rendering on the IBM Blue Gene/P
—In addition to their role as simulation engines, modern supercomputers can be harnessed for scientific visualization. Their extensive concurrency, parallel storage systems, and...
Tom Peterka, Hongfeng Yu, Robert B. Ross, Kwan-Liu...
111
Voted
VLSID
2006
IEEE
153views VLSI» more  VLSID 2006»
16 years 3 months ago
An Asynchronous Interconnect Architecture for Device Security Enhancement
We present a new style of long-distance, on-chip interconnect, based loosely on the asynchronous GasP architecture. It has a number of advantages over conventional designs, the mo...
Simon Hollis, Simon W. Moore
135
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HPCA
2001
IEEE
16 years 3 months ago
Automatically Mapping Code on an Intelligent Memory Architecture
This paper presents an algorithm to automatically map code on a generic intelligent memory system that consists of a host processor and a simpler memory processor. To achieve high...
Jaejin Lee, Yan Solihin, Josep Torrellas