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AINA
2008
IEEE
14 years 5 months ago
Thread Allocation in Chip Multiprocessor Based Multithreaded Network Processors
—This work tries to derive ideas for thread allocation in Chip Multiprocessor (CMP)-based network processors performing general applications by Continuous-Time Markov Chain model...
Yi-Neng Lin, Ying-Dar Lin, Yuan-Cheng Lai
HPCA
2008
IEEE
14 years 11 months ago
Power-Efficient DRAM Speculation
Power-Efficient DRAM Speculation (PEDS) is a power optimization targeted at broadcast-based sharedmemory multiprocessor systems that speculatively access DRAM in parallel with the...
Nidhi Aggarwal, Jason F. Cantin, Mikko H. Lipasti,...
IPPS
2006
IEEE
14 years 4 months ago
Making lockless synchronization fast: performance implications of memory reclamation
Achieving high performance for concurrent applications on modern multiprocessors remains challenging. Many programmers avoid locking to improve performance, while others replace l...
Thomas E. Hart, Paul E. McKenney, Angela Demke Bro...
IPPS
2006
IEEE
14 years 4 months ago
Accelerating shape optimizing load balancing for parallel FEM simulations by algebraic multigrid
We propose a load balancing heuristic for parallel adaptive finite element method (FEM) simulations. In contrast to most existing approaches, the heuristic focuses on good partit...
Henning Meyerhenke, Burkhard Monien, Stefan Schamb...
ISCA
2008
IEEE
148views Hardware» more  ISCA 2008»
14 years 5 months ago
Atomic Vector Operations on Chip Multiprocessors
The current trend is for processors to deliver dramatic improvements in parallel performance while only modestly improving serial performance. Parallel performance is harvested th...
Sanjeev Kumar, Daehyun Kim, Mikhail Smelyanskiy, Y...