1710 search results - page 252 / 342 » Parallelism in Structured Newton Computations |
HPCA
2006
IEEE
14 years 10 months ago
2006
IEEE
In high-end processors, increasing the number of in-flight instructions can improve performance by overlapping useful processing with long-latency accesses to the main memory. Buf...
HPCA
2006
IEEE
14 years 10 months ago
2006
IEEE
Building processors with large instruction windows has been proposed as a mechanism for overcoming the memory wall, but finding a feasible and implementable design has been an elu...
HPCA
2004
IEEE
14 years 10 months ago
2004
IEEE
Design of wakeup-free issue queues is becoming desirable due to the increasing complexity associated with broadcast-based instruction wakeup. The effectiveness of most wakeup-free...
ICS
2009
Tsinghua U.
14 years 4 months ago
2009
Tsinghua U.
The speed gap between processor and memory continues to limit performance. To address this problem, we explore the potential of eliminating Zero Loads—loads accessing memory loc...
CCGRID
2005
IEEE
14 years 3 months ago
2005
IEEE
Data services for the Grid have focussed so far primarily on virtualising access to distributed databases, and encapsulating file location. However, orchestration of services requ...