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» Parallelism through Digital Circuit Design
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IPPS
2005
IEEE
14 years 1 months ago
Dynamic Delay-Fault Injection for Reconfigurable Hardware
Modern internet and telephone switches consist of numerous VLSI-circuits operating at high frequencies to handle high bandwidths. It is beyond question that such systems must cont...
Bernhard Fechner
VLSI
2010
Springer
13 years 2 months ago
A design workflow for dynamically reconfigurable multi-FPGA systems
Multi-FPGA systems (MFS's) represent a promising technology for various applications, such as the implementation of supercomputers and parallel and computational intensive emu...
Alessandro Panella, Marco D. Santambrogio, Frances...
ISCA
2010
IEEE
240views Hardware» more  ISCA 2010»
14 years 21 days ago
Modeling critical sections in Amdahl's law and its implications for multicore design
This paper presents a fundamental law for parallel performance: it shows that parallel performance is not only limited by sequential code (as suggested by Amdahl’s law) but is a...
Stijn Eyerman, Lieven Eeckhout
ICRA
2010
IEEE
151views Robotics» more  ICRA 2010»
13 years 5 months ago
A robust, low-cost and low-noise artificial skin for human-friendly robots
As robots and humans move towards sharing the same environment, the need for safety in robotic systems is of growing importance. Towards this goal of human-friendly robotics, a rob...
John Ulmen, Mark R. Cutkosky
FPGA
1999
ACM
174views FPGA» more  FPGA 1999»
13 years 12 months ago
Reduction of Latency and Resource Usage in Bit-Level Pipelined Data Paths for FPGAs
Pipelining of data path structures increases the throughput rate at the expense of enlarged resource usage and latency unless architectures optimized towards specific applications...
Peter Kollig, Bashir M. Al-Hashimi