1074 search results - page 170 / 215 » Parallelizing post-placement timing optimization |
ICPADS
2007
IEEE
14 years 2 months ago
2007
IEEE
Min, Veeravalli, and Barlas have recently proposed strategies to minimize the overall execution time of one or several divisible loads on a heterogeneous linear network, using one...
DATE
2005
IEEE
14 years 1 months ago
2005
IEEE
Conventional cache models are not suited for real-time parallel processing because tasks may flush each other’s data out of the cache in an unpredictable manner. In this way th...
IDEAS
2000
IEEE
14 years 2 days ago
2000
IEEE
Today many applications routinely generate large quantities of data. The data often takes the form of (time) series, or more generally streams, i.e. an ordered sequence of records...
ESTIMEDIA
2004
Springer
14 years 1 months ago
2004
Springer
We proposed a hardware accelerator IP for the Tier-1 portion of Embedded Block Coding with Optimal Truncation (EBCOT) used in the JPEG2000 next generation image compression standa...
FPL
2003
Springer
14 years 27 days ago
2003
Springer
Abstract. Hardware realization of kernel loops holds the promise of accelerating the overall application performance and is therefore an important part of the synthesis process. In...