356 search results - page 15 / 72 » Parallelizing time with polynomial circuits |
ASPDAC
2005
ACM
13 years 10 months ago
2005
ACM
Abstract— In this paper we study the testability of circuits derived from Binary Decision Diagrams (BDDs) under the bridging fault model. It is shown that testability can be form...
SIAMCOMP
2010
13 years 2 months ago
2010
Abstract. In this paper we study variants of the non-preemptive parallel job scheduling problem where the number of machines is polynomially bounded in the number of jobs. For this...
STACS
1997
Springer
14 years 1 days ago
1997
Springer
In this paper we present a new notion of what it means for a problem in P to be inherently sequential. Informally, a problem L is strictly sequential P-complete if when the best kn...
ISCAS
2002
IEEE
14 years 25 days ago
2002
IEEE
This paper presents new circuit configurationsfor a more robust and efficient form of self-resettingCMOS (SRCMOS). Prior structures for SRCMOS have very high performance but are...
ASPDAC
2004
ACM
13 years 11 months ago
2004
ACM
- Minimum area is one of the important objectives in technology mapping for lookup table-based FPGAs. It has been proven that the problem is NP-complete. This paper presents a poly...