In this paper, the problem of sizing MOS Current Mode Logic (MCML) circuits is addressed. The Pareto front is introduced as a useful analysis tool to explore the design space of e...
Roberto Pereira-Arroyo, Pablo Alvarado-Moya, Wolfg...
A transaction defines a locus of computation that satisfies important concurrency and failure properties; these so-called ACID properties provide strong serialization guarantees ...
Jan Vitek, Suresh Jagannathan, Adam Welc, Antony L...
In this paper, we describe NoCGEN, a Network On Chip (NoC) generator, which is used to create a simulatable and synthesizable NoC description. NoCGEN uses a set of modularised rou...
There is a strong need now for compilers of embedded systems to find effective ways of optimizing series of loop-nests, wherein majority of the memory references occur in the fo...
Javed Absar, Min Li, Praveen Raghavan, Andy Lambre...
The main motivation for applying capacity planning techniques to the design of Internet-based video services is that very often these systems incur significant delays that decrea...
Giuliano Casale, Paolo Cremonesi, Giuseppe Serazzi...