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» Patching Processor Design Errors
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DSN
2002
IEEE
14 years 1 months ago
Ditto Processor
Concentration of design effort for current single-chip Commercial-Off-The-Shelf (COTS) microprocessors has been directed towards performance. Reliability has not been the primary ...
Shih-Chang Lai, Shih-Lien Lu, Jih-Kwon Peir
DAC
2010
ACM
13 years 7 months ago
An error tolerance scheme for 3D CMOS imagers
A three-dimensional (3D) CMOS imager constructed by stacking a pixel array of backside illuminated sensors, an analog-to-digital converter (ADC) array, and an image signal process...
Hsiu-Ming Chang, Jiun-Lang Huang, Ding-Ming Kwai, ...
IEEEPACT
2007
IEEE
14 years 2 months ago
Unified Architectural Support for Soft-Error Protection or Software Bug Detection
In this paper we propose a unified architectural support that can be used flexibly for either soft-error protection or software bug detection. Our approach is based on dynamically...
Martin Dimitrov, Huiyang Zhou
ISQED
2005
IEEE
108views Hardware» more  ISQED 2005»
14 years 2 months ago
Error Analysis for the Support of Robust Voltage Scaling
Recently, a new Dynamic Voltage Scaling (DVS) scheme has been proposed that increases energy efficiency significantly by allowing the processor to operate at or slightly below the...
David Roberts, Todd M. Austin, David Blaauw, Trevo...
DATE
2009
IEEE
103views Hardware» more  DATE 2009»
14 years 3 months ago
Masking timing errors on speed-paths in logic circuits
There is a growing concern about timing errors resulting from design marginalities and the effects of circuit aging on speed-paths in logic circuits. This paper presents a low ove...
Mihir R. Choudhury, Kartik Mohanram