Scalability of parallel architectures is an interesting area of current research. Shared memory parallel programming is attractive stemming from its relative ease in transitioning...
Umakishore Ramachandran, Gautam Shah, Ravi Kumar, ...
We present a technique to approximate the worst-case execution time that combines structural analysis with a loop-bounding algorithm based on local induction variable analysis. St...
— Although the LUT (look-up table) size of FPGAs has been optimized for general applications, complicated designs may contain a large number of cascaded LUTs between flip-flops...
The significance of high-performance dedicated networks has been well recognized due to the rapidly increasing number of large-scale applications that require high-speed data tran...
— The dynamic nature of mobile ad hoc networks poses fundamental challenges to the design of service composition schemes that can minimize the effect of service disruptions. Alth...