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DAC
2007
ACM
14 years 2 months ago
A Framework for the Validation of Processor Architecture Compliance
We present a framework for validating the compliance of a design with a given architecture. Our approach is centered on the concept of misinterpretations. These include missing be...
Allon Adir, Sigal Asaf, Laurent Fournier, Itai Jae...
VTS
2005
IEEE
96views Hardware» more  VTS 2005»
14 years 4 months ago
Pseudo-Functional Scan-based BIST for Delay Fault
This paper presents a pseudo-functional BIST scheme that attempts to minimize the over-testing problem of logic BIST for delay and crosstalk-induced failures. The over-testing pro...
Yung-Chieh Lin, Feng Lu, Kwang-Ting Cheng
AUSAI
2005
Springer
14 years 4 months ago
A Lagrangian Heuristic for Winner Determination Problem in Combinatorial Auctions
Abstract. We present a Lagrangian-based heuristic LAHA for the Winner Determination Problem in Combinatorial Auctions. The algorithm makes use of the market computing power by appl...
Andrew Lim, Jiqing Tang
COMPSAC
2009
IEEE
14 years 5 months ago
Software Input Space Modeling with Constraints among Parameters
—This paper considers the task of software test case generation from a large space of values of input parameters. The purpose of the paper is to create a model of software input ...
Sergiy A. Vilkomir, W. Thomas Swain, Jesse H. Poor...
DATE
2008
IEEE
174views Hardware» more  DATE 2008»
14 years 5 months ago
Calibration of Integrated CMOS Hall Sensors Using Coil-on-Chip in ATE Environment
Due to high demand for hall sensors mostly in the automotive and industrial applications, development and manufacturing of hall sensors in System-on-Chip (SoC) became more importa...
Mustafa Badaroglu, Guy Decabooter, Francois Laulan...