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» Pattern-Constrained Test Case Generation
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68
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ITC
2003
IEEE
108views Hardware» more  ITC 2003»
15 years 7 months ago
Optical and Electrical Testing of Latchup in I/O Interface Circuits
Backside light emission and electrical measurements were used to evaluate the susceptibility to latchup of externally cabled I/O pins for a 0.13 µm technology generation [1,2] te...
Franco Stellari, Peilin Song, Moyra K. McManus, Ro...
MTDT
2000
IEEE
129views Hardware» more  MTDT 2000»
15 years 7 months ago
Using GLFSRs for Pseudo-Random Memory BIST
In this work, we present the application of Generalized Linear Feedback Shift Registers (GLFSRs) for generation of patterns for pseudo-random memory Built-In SelfTest (BIST). Rece...
Michael Redeker, Markus Rudack, Thomas Lobbe, Dirk...
105
Voted
ECIS
2003
15 years 4 months ago
Towards definitive benchmarking of algorithm performance
One of the primary methods employed by researchers to judge the merits of new heuristics and algorithms is to run them on accepted benchmark test cases and comparing their perform...
Andrew Lim, Wee-Chong Oon, Wenbin Zhu
115
Voted
GECCO
2004
Springer
197views Optimization» more  GECCO 2004»
15 years 8 months ago
Applying Evolutionary Testing to Search for Critical Defects
Software systems are used regularly in safety-relevant applications. Therefore, the occurrence of critical defects may not only cause costly recalls but may also endanger human liv...
André Baresel, Harmen Sthamer, Joachim Wege...
99
Voted
IFM
2005
Springer
15 years 8 months ago
Generating Path Conditions for Timed Systems
We provide an automatic method for calculating the path condition for programs with real time constraints. This method can be used for the semiautomatic verification of a unit of ...
Saddek Bensalem, Doron Peled, Hongyang Qu, Stavros...