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HPCA
2004
IEEE
14 years 8 months ago
Stream Register Files with Indexed Access
Many current programmable architectures designed to exploit data parallelism require computation to be structured to operate on sequentially accessed vectors or streams of data. A...
Nuwan Jayasena, Mattan Erez, Jung Ho Ahn, William ...
ITC
1998
IEEE
114views Hardware» more  ITC 1998»
14 years 14 days ago
BETSY: synthesizing circuits for a specified BIST environment
This paper presents a logic synthesis tool called BETSY (BIST Environment Testable Synthesis) for synthesizing circuits that achieve complete (100%)fault coverage in a user specif...
Zhe Zhao, Bahram Pouya, Nur A. Touba
ASWEC
2004
IEEE
13 years 12 months ago
An Environment for Automated Performance Evaluation of J2EE and ASP.NET Thin-client Architectures
Assessing the likely run-time performance of applications using thin-client architectures during their design is very difficult. We describe SoftArch/Thin, a thin-client test-bed ...
John C. Grundy, Zhong Wei, Radu Nicolescu, Yuhong ...
IPPS
2007
IEEE
14 years 2 months ago
Experience of Optimizing FFT on Intel Architectures
Automatic library generators, such as ATLAS [11], Spiral [8] and FFTW [2], are promising technologies to generate efficient code for different computer architectures. The library...
Daniel Orozco, Liping Xue, Murat Bolat, Xiaoming L...
HPCA
2002
IEEE
14 years 8 months ago
Quantifying Load Stream Behavior
The increasing performance gap between processors and memory will force future architectures to devote significant resources towards removing and hiding memory latency. The two ma...
Suleyman Sair, Timothy Sherwood, Brad Calder