5799 search results - page 35 / 1160 » Patterns Generate Architectures |
ICCAD
1998
IEEE
14 years 4 days ago
1998
IEEE
In this paper, we present results for significantly improving the performance of sequential circuit diagnostic test pattern generation (DATPG). Our improvements are achieved by de...
IJON
2000
13 years 7 months ago
2000
Central pattern generators (CPGs) have traditionally been modeled as sets of coupled bistable oscillators [2]. We present a framework for constructing models which avoid the short...
VTS
2008
IEEE
14 years 2 months ago
2008
IEEE
— Higher chip densities and the push for higher performance have continued to drive design needs. Transition delay fault testing has become the preferred method for ensuring thes...
DATE
2000
IEEE
14 years 9 days ago
2000
IEEE
∗∗ Functional BIST is a promising solution for self-testing complex digital systems at reduced costs in terms of area and performance degradation. The present paper addresses t...
ITC
1995
IEEE
13 years 11 months ago
1995
IEEE
During built-in self-test (BIST), the set of patterns generated by a pseudo-random pattern generator may not provide a sufficiently high fault coverage. This paper presents a new ...