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5799
search results - page 55 / 1160
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Patterns Generate Architectures
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GLVLSI
1997
IEEE
131
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VLSI
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GLVLSI 1997
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Analog Circuit Model of Lamprey Unit Pattern Generator
14 years 5 days ago
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www.cecs.uci.edu
Elizabeth J. Brauer, Ranu Jung, Denise M. Wilson, ...
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18
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GLVLSI
1997
IEEE
92
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VLSI
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GLVLSI 1997
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An Efficient Dynamic Parallel Approach to Automatic Test Pattern Generation
14 years 5 days ago
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H.-Ch. Dahmen, Uwe Gläser, Heinrich Theodor V...
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29
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VTS
1996
IEEE
75
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Hardware
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VTS 1996
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A new test pattern generation method for delay fault testing
14 years 3 days ago
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www.lirmm.fr
S. Cremoux, Christophe Fagot, Patrick Girard, Chri...
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DATE
2004
IEEE
158
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Hardware
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DATE 2004
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Automatic Scan Insertion and Pattern Generation for Asynchronous Circuits
13 years 11 months ago
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ftp.cs.man.ac.uk
This paper presents 3LSSD, a novel, easilyautomatable approach for scan insertion and ATPG of asynchronous circuits. 3LSSD inserts scan latches only into global circuit feedback p...
Aristides Efthymiou, Christos P. Sotiriou, Douglas...
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KDD
2000
ACM
78
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Data Mining
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KDD 2000
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Depth first generation of long patterns
13 years 11 months ago
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www.cs.tau.ac.il
Ramesh C. Agarwal, Charu C. Aggarwal, V. V. V. Pra...
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