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VTS
2008
IEEE
136views Hardware» more  VTS 2008»
14 years 2 months ago
Test-Pattern Grading and Pattern Selection for Small-Delay Defects
Timing-related defects are becoming increasingly important in nanometer technology designs. Small delay variations induced by crosstalk, process variations, powersupply noise, as ...
Mahmut Yilmaz, Krishnendu Chakrabarty, Mohammad Te...
DAC
2000
ACM
14 years 9 months ago
Self-test methodology for at-speed test of crosstalk in chip interconnects
The effect of crosstalk errors is most significant in highperformance circuits, mandating at-speed testing for crosstalk defects. This paper describes a self-test methodology that...
Xiaoliang Bai, Sujit Dey, Janusz Rajski
ISORC
2005
IEEE
14 years 1 months ago
An Integrated Architecture for Future Car Generations
Depending on the physical structuring of large distributed safety-critical real-time systems, one can distinguish federated and integrated system architectures. The DECOS architec...
Philipp Peti, Roman Obermaisser, Fulvio Tagliabo, ...
ICSE
2010
IEEE-ACM
14 years 24 days ago
Providing support for creating next generation software architecture languages
Many languages for software architectures have been proposed, each dealing with different stakeholder concerns, operating at different levels of abstraction and with different deg...
Ivano Malavolta
DAC
2001
ACM
14 years 9 months ago
Address Code Generation for Digital Signal Processors
Sathishkumar Udayanarayanan, Chaitali Chakrabarti