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ASAP
2009
IEEE
143views Hardware» more  ASAP 2009»
14 years 8 months ago
Scalar Processing Overhead on SIMD-Only Architectures
—The Cell processor consists of a general-purpose core and eight cores with a complete SIMD instruction set. Although originally designed for multimedia and gaming, it is current...
Arnaldo Azevedo Filho, Ben H. H. Juurlink
ICCD
2002
IEEE
128views Hardware» more  ICCD 2002»
14 years 7 months ago
Subword Sorting with Versatile Permutation Instructions
Subword parallelism has succeeded in accelerating many multimedia applications. Subword permutation instructions have been proposed to efficiently rearrange subwords in or among r...
Zhijie Shi, Ruby B. Lee
ICCAD
2006
IEEE
108views Hardware» more  ICCAD 2006»
14 years 7 months ago
Formal model of data reuse analysis for hierarchical memory organizations
– In real-time data-dominated communication and multimedia processing applications, due to the manipulation of large sets of data, a multi-layer memory hierarchy is used to enhan...
Ilie I. Luican, Hongwei Zhu, Florin Balasa
ICCAD
2001
IEEE
126views Hardware» more  ICCAD 2001»
14 years 7 months ago
Constraint Satisfaction for Relative Location Assignment and Scheduling
Tight data- and timing constraints are imposed by communication and multimedia applications. The architecture for the embedded processor imply resource constraints. Instead of ran...
Carlos A. Alba Pinto, Bart Mesman, Jochen A. G. Je...
PERCOM
2009
ACM
14 years 5 months ago
QoS Enabled Mobility Support for Mesh Networks
Abstract—Existing solutions for building wireless mesh networks suffer from reduced efficiency. This is due to lack of reliable self-configuration procedures that can dynamical...
Dario Gallucci, Silvia Giordano