Abstract—A bit-node centric decoder architecture for lowdensity parity-check codes is proposed. This architecture performs the optimum sum-product algorithm. A bit node processin...
Ruwan N. S. Ratnayake, Erich F. Haratsch, Gu-Yeon ...
Power consumption of system-level on-chip communications is becoming more significant in the overall system-on-chip (SoC) power as technology scales down. In this paper, we propos...
Renshen Wang, Nan-Chi Chou, Bill Salefski, Chung-K...
The Virtual Interface Architecture (VIA) is an industry standard user-level communication architecture for system area networks. The VIA provides a protected, directlyaccessible i...
Separation between computation and communication in system design allows the system designer to explore the communication architecture independently of component selection and map...
In this paper, we survey recent advances in mobility modeling for mobile ad hoc network research. The advances include some new mobility models and analysis of older mobility mode...