25 search results - page 4 / 5 » Performance Energy Optimization of DSP Transforms on the XSc... |
CASES
2005
ACM
13 years 9 months ago
2005
ACM
Digital Signal Processing (DSP) is becoming increasingly widespread in portable devices. Due to harsh constraints on power, latency, and throughput in embedded environments, devel...
DATE
2003
IEEE
14 years 23 days ago
2003
IEEE
This paper presents a novel source code transformation for control flow optimizationcalled loop nest splitting which minimizes the number of executed if-statements in loop nests ...
ISCA
2010
IEEE
13 years 6 months ago
2010
IEEE
Due to their high volume, general-purpose processors, and now chip multiprocessors (CMPs), are much more cost effective than ASICs, but lag significantly in terms of performance a...
CODES
2005
IEEE
14 years 1 months ago
2005
IEEE
Nested loops are the most critical sections in many scientific and Digital Signal Processing (DSP) applications. It is important to study effective and efficient transformation ...
CODES
2008
IEEE
14 years 1 months ago
2008
IEEE
Processor Idle Cycle Aggregation (PICA) is a promising approach for low power execution of processors, in which small memory stalls are aggregated to create a large one, and the p...