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HPCA
2009
IEEE
14 years 9 months ago
Design and evaluation of a hierarchical on-chip interconnect for next-generation CMPs
Performance and power consumption of an on-chip interconnect that forms the backbone of Chip Multiprocessors (CMPs), are directly influenced by the underlying network topology. Bo...
Reetuparna Das, Soumya Eachempati, Asit K. Mishra,...
CGO
2005
IEEE
14 years 2 months ago
Performance of Runtime Optimization on BLAST
Optimization of a real world application BLAST is used to demonstrate the limitations of static and profile-guided optimizations and to highlight the potential of runtime optimiz...
Abhinav Das, Jiwei Lu, Howard Chen, Jinpyo Kim, Pe...
ENTCS
2010
118views more  ENTCS 2010»
13 years 6 months ago
Systematic Refinement of Performance Models for Concurrent Component-based Systems
Model-driven performance prediction methods require detailed design models to evaluate the performance of software systems during early development stages. However, the complexity...
Lucia Kapová, Steffen Becker
DSN
2009
IEEE
14 years 3 months ago
Fluid modeling and control for server system performance and availability
Although server technology provides a means to support a wide range of online services and applications, their ad-hoc configuration poses significant challenges to the performan...
Luc Malrait, Sara Bouchenak, Nicolas Marchand
IPPS
2008
IEEE
14 years 3 months ago
Performance characterization and optimization of parallel I/O on the Cray XT
This paper presents an extensive characterization, tuning, and optimization of parallel I/O on the Cray XT supercomputer, named Jaguar, at Oak Ridge National Laboratory. We have c...
Weikuan Yu, Jeffrey S. Vetter, Sarp Oral