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ANSS
2006
IEEE
14 years 3 months ago
iSimBioSys: A Discrete Event Simulation Platform for 'in silico' study of biological systems
With the availability of huge databases cataloguing the various molecular “parts” of complex biological systems, researchers from multiple disciplines have focused on developi...
Samik Ghosh, Preetam Ghosh, Kalyan Basu, Sajal K. ...
ICPP
2002
IEEE
14 years 2 months ago
Analysis of Memory Hierarchy Performance of Block Data Layout
Recently, several experimental studies have been conducted on block data layout as a data transformation technique used in conjunction with tiling to improve cache performance. In...
Neungsoo Park, Bo Hong, Viktor K. Prasanna
IPPS
2002
IEEE
14 years 2 months ago
Optimizing Graph Algorithms for Improved Cache Performance
Tiling has long been used to improve cache performance. Recursion has recently been used as a cache-oblivious method of improving cache performance. Both of these techniques are n...
Joon-Sang Park, Michael Penner, Viktor K. Prasanna
DATE
2003
IEEE
108views Hardware» more  DATE 2003»
14 years 2 months ago
Generalized Posynomial Performance Modeling
This paper presents a new method to automatically generate posynomial symbolic expressions for the performance characteristics of analog integrated circuits. The coefficient set ...
Tom Eeckelaert, Walter Daems, Georges G. E. Gielen...
CODES
2004
IEEE
14 years 27 days ago
CPU scheduling for statistically-assured real-time performance and improved energy efficiency
We present a CPU scheduling algorithm, called Energy-efficient Utility Accrual Algorithm (or EUA), for battery-powered, embedded real-time systems. We consider an embedded softwar...
Haisang Wu, Binoy Ravindran, E. Douglas Jensen, Pe...