472 search results - page 68 / 95 » Performance Evaluation of Memory Caches in Multiprocessors |
ICCAD
2009
IEEE
13 years 6 months ago
2009
IEEE
The emerging Spin Torque Transfer memory (STT-RAM) is a promising candidate for future on-chip caches due to STT-RAM's high density, low leakage, long endurance and high acce...
IEEEPACT
1998
IEEE
14 years 29 days ago
1998
IEEE
The SGI Origin 2000 is designedto support a wide range of applications and has low local and remote memory latencies. However, it often has a high ratio of remote to local misses....
IPPS
2007
IEEE
14 years 3 months ago
2007
IEEE
The trend of increasing speed and complexity in the single-core processor as stated in the Moore’s law is facing practical challenges. As a result, the multi-core processor arch...
DATE
2008
IEEE
14 years 3 months ago
2008
IEEE
—Unencrypted data appearing on the processor– memory bus can result in security violations, e.g., allowing attackers to gather keys to financial accounts and personal data. Al...
ICS
2007
Tsinghua U.
14 years 2 months ago
2007
Tsinghua U.
Increased complexity of memory systems to ameliorate the gap between the speed of processors and memory has made it increasingly harder for compilers to optimize an arbitrary code...