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ISCA
2010
IEEE
199views Hardware» more  ISCA 2010»
14 years 22 days ago
A case for FAME: FPGA architecture model execution
Given the multicore microprocessor revolution, we argue that the architecture research community needs a dramatic increase in simulation capacity. We believe FPGA Architecture Mod...
Zhangxi Tan, Andrew Waterman, Henry Cook, Sarah Bi...
ICES
2010
Springer
277views Hardware» more  ICES 2010»
13 years 5 months ago
An Efficient, High-Throughput Adaptive NoC Router for Large Scale Spiking Neural Network Hardware Implementations
Recently, a reconfigurable and biologically inspired paradigm based on network-on-chip (NoC) and spiking neural networks (SNNs) has been proposed as a new method of realising an ef...
Snaider Carrillo, Jim Harkin, Liam McDaid, Sandeep...
IPPS
1998
IEEE
14 years 4 days ago
Partial Rearrangements of Space-Shared FPGAs
Abstract Oliver Diessel1 and Hossam ElGindy2 1Department of Computer Science and Software Engineering 2Department of Electrical and Computer Engineering The University of Newcastle...
Oliver Diessel, Hossam A. ElGindy
ICPADS
2002
IEEE
14 years 25 days ago
Sago: A Network Resource Management System for Real-Time Content Distribution
Abstract— Content replication and distribution is an effective technology to reduce the response time for web accesses and has been proven quite popular among large Internet cont...
Tzi-cker Chiueh, Kartik Gopalan, Anindya Neogi, Ch...
DSN
2008
IEEE
14 years 2 months ago
Enhancing data availability in disk drives through background activities
Latent sector errors in disk drives affect only a few data sectors. They occur silently and are detected only when the affected area is accessed again. If a latent error is detect...
Ningfang Mi, Alma Riska, Evgenia Smirni, Erik Ried...