114 search results - page 7 / 23 » Performance Evaluation of Task Pools Based on Hardware Synch... |
FCCM
2007
IEEE
14 years 2 months ago
2007
IEEE
This paper presents the porting of an RTOS Micro C/OS-II on a novel reconfigurable instruction cell based architecture which fills the gap between DSP, FPGA and ASIC with high per...
DATE
2007
IEEE
14 years 2 months ago
2007
IEEE
In deep submicron circuits, elevation in temperatures has brought new challenges in reliability, timing, performance, cooling costs and leakage power. Conventional thermal managem...
CC
2011
Springer
12 years 11 months ago
2011
Springer
Abstract. Heterogeneous multi-core platforms are increasingly prevalent due to their perceived superior performance over homogeneous systems. The best performance, however, can onl...
ASPDAC
2007
ACM
13 years 11 months ago
2007
ACM
Dynamic voltage scaling (DVS) circuits have been widely adopted in many computing systems to provide tradeoff between performance and power consumption. The effective use of energ...
RTAS
2006
IEEE
2006
IEEE
METERG: Measurement-Based End-to-End Performance Estimation Technique in QoS-Capable Multiprocessors
14 years 1 months ago
Multiprocessor systems present serious challenges in the design of real-time systems due to the wider variation of execution time of an instruction sequence compared to a uniproce...