372 search results - page 54 / 75 » Performance Studies of a Parallel Prolog Architecture |
MICRO
2003
IEEE
14 years 1 months ago
2003
IEEE
Due to the widespread software piracy and virus attacks, significant efforts have been made to improve security for computer systems. For stand-alone computers, a key observation...
ISCA
2011
IEEE
13 years 6 days ago
2011
IEEE
Since 2005, processor designers have increased core counts to exploit Moore’s Law scaling, rather than focusing on single-core performance. The failure of Dennard scaling, to wh...
HPCA
2007
IEEE
14 years 8 months ago
2007
IEEE
This paper evaluates the suitability of the MapReduce model for multi-core and multi-processor systems. MapReduce was created by Google for application development on data-centers...
ICPPW
2006
IEEE
14 years 2 months ago
2006
IEEE
Modulo scheduling is a major optimization of high performance compilers wherein The body of a loop is replaced by an overlapping of instructions from different iterations. Hence ...
ICA3PP
2010
Springer
14 years 1 months ago
2010
Springer
Abstract. Finite volume numerical methods have been widely studied, implemented and parallelized on multiprocessor systems or on clusters. Modern graphics processing units (GPU) pr...