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» Performance and Overhead in a Hybrid Reconfigurable Computer
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HPDC
2008
IEEE
13 years 7 months ago
Eliminating the middleman: peer-to-peer dataflow
Efficiently executing large-scale, data-intensive workflows such as Montage must take into account the volume and pattern of communication. When orchestrating data-centric workflo...
Adam Barker, Jon B. Weissman, Jano I. van Hemert
ISCA
2008
IEEE
205views Hardware» more  ISCA 2008»
14 years 1 months ago
VEAL: Virtualized Execution Accelerator for Loops
Performance improvement solely through transistor scaling is becoming more and more difficult, thus it is increasingly common to see domain specific accelerators used in conjunc...
Nathan Clark, Amir Hormati, Scott A. Mahlke
DAC
2007
ACM
14 years 8 months ago
Towards An Ultra-Low-Power Architecture Using Single-Electron Tunneling Transistors
Minimizing power consumption is vitally important in embedded system design; power consumption determines battery lifespan. Ultralow-power designs may even permit embedded systems...
Changyun Zhu, Zhenyu (Peter) Gu, Li Shang, Robert ...
HOTI
2011
IEEE
12 years 7 months ago
iWISE: Inter-router Wireless Scalable Express Channels for Network-on-Chips (NoCs) Architecture
Abstract—Network-on-Chips (NoCs) paradigm is fast becoming a defacto standard for designing communication infrastructure for multicores with the dual goals of reducing power cons...
Dominic DiTomaso, Avinash Kodi, Savas Kaya, David ...
CLUSTER
2009
IEEE
14 years 1 days ago
A scalable and generic task scheduling system for communication libraries
Abstract—Since the advent of multi-core processors, the physionomy of typical clusters has dramatically evolved. This new massively multi-core era is a major change in architectu...
François Trahay, Alexandre Denis