157 search results - page 7 / 32 » Performance area efficiency in chip multiprocessors with mic... |
HPCA
2005
IEEE
14 years 7 months ago
2005
IEEE
In this paper, we study the instruction cache miss behavior of four modern commercial applications (a database workload, TPC-W, SPECjAppServer2002 and SPECweb99). These applicatio...
IEEEPACT
2008
IEEE
14 years 1 months ago
2008
IEEE
Recently, chip multiprocessors (CMPs) have arisen as the de facto design for modern high-performance processors, with increasing core counts. An important property of CMPs is that...
IEEEPACT
2008
IEEE
14 years 1 months ago
2008
IEEE
Moore’s Law and the drive towards performance efficiency have led to the on-chip integration of general-purpose cores with special-purpose accelerators. Pangaea is a heterogeneo...
SIGARCH
2008
13 years 7 months ago
2008
While technology trends have ushered in the age of chip multiprocessors (CMP) and enabled designers to place an increasing number of cores on chip, a fundamental question is what ...
HPCA
2006
IEEE
14 years 7 months ago
2006
IEEE
Simulation is an important means of evaluating new microarchitectures. Current trends toward chip multiprocessors (CMPs) try the ability of designers to develop efficient simulato...