40 search results - page 1 / 8 » Performance driven global routing for standard cell design |
ISPD
1997
ACM
14 years 3 months ago
1997
ACM
Advances in fabrication technology have resulted in a continual shrinkage of device dimensions. This has resulted in smaller device delays, greater resistance along interconnect w...
ICCD
1991
IEEE
14 years 2 months ago
1991
IEEE
GLVLSI
2000
IEEE
14 years 3 months ago
2000
IEEE
We present a new timing driven method for global placement. Our method is based on the observation that similar net length reductions in the different nets that make up a path may...
DATE
2005
IEEE
14 years 4 months ago
2005
IEEE
In this paper, we present an experimental integrated platform for the research, development and evaluation of new VLSI back-end algorithms and design flows. Interconnect scaling ...
DAC
1998
ACM
14 years 11 months ago
1998
ACM
In this paper we present a new global router appropriate for Multichip Module MCM and dense Printed Circuit Board PCB design, which utilizes a hybrid of the classical rip-up and r...