176 search results - page 24 / 36 » Performance improvement with circuit-level speculation |
ISQED
2007
IEEE
14 years 1 months ago
2007
IEEE
We propose gate level statistical simulation to bridge the gap between the most accurate Monte Carlo SPICE simulation and the most efficient circuit level statistical static timi...
ISCAPDCS
2003
13 years 8 months ago
2003
This paper presents the Dynamic Simultaneous Multithreaded Architecture (DSMT). DSMT efficiently executes multiple threads from a single program on a SMT processor core. To accomp...
ISCA
1997
IEEE
13 years 11 months ago
1997
IEEE
As processor architectures have increased their reliance on speculative execution to improve performance, the importance of accurate prediction of what to execute speculatively ha...
ICCD
2006
IEEE
14 years 4 months ago
2006
IEEE
Abstract— Recent research has shown that forwarding speculative data to other processors before it is requested can improve the performance of multiprocessor systems. The most re...
CODES
2011
IEEE
12 years 7 months ago
2011
IEEE
Two overriding concerns in the development of embedded MPSoCs are ease of programming and hardware complexity. In this paper we present SoC-TM, an integrated HW/SW solution for tr...