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» Performance models for hierarchical grid architectures
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ICCAD
2002
IEEE
141views Hardware» more  ICCAD 2002»
14 years 4 months ago
A hierarchical modeling framework for on-chip communication architectures
— The communication sub-system of complex IC systems is increasingly critical for achieving system performance. Given this, it is important that the on-chip communication archite...
Xinping Zhu, Sharad Malik
ESCIENCE
2006
IEEE
13 years 11 months ago
Economy-Based Data Replication Broker
Data replication is one of the key components in data grid architecture as it enhances data access and reliability and minimises the cost of data transmission. In this paper, we a...
Henry Lin, Jemal H. Abawajy, Rajkumar Buyya
JNW
2008
182views more  JNW 2008»
13 years 7 months ago
Evaluating the Performance of Fast Handover for Hierarchical MIPv6 in Cellular Networks
Next-Generation Wireless Networks (NGWNs) present an all-IP-based architecture integrating existing cellular networks with Wireless Local Area Networks (WLANs), Wireless Metropolit...
Li Jun Zhang, Samuel Pierre
ISPDC
2008
IEEE
14 years 2 months ago
Performance Analysis of Grid DAG Scheduling Algorithms using MONARC Simulation Tool
This paper presents a new approach for analyzing the performance of grid scheduling algorithms for tasks with dependencies. Finding the optimal procedures for DAG scheduling in Gr...
Florin Pop, Ciprian Dobre, Valentin Cristea
TOMACS
1998
140views more  TOMACS 1998»
13 years 7 months ago
Technical Note: A Hierarchical Computer Architecture Design and Simulation Environment
architectures at multiple levels of abstraction, encompassing both hardware and software. It has five modes of operation (Design, Model Validation, Build Simulation, Simulate Syste...
Paul S. Coe, Fred W. Howell, Roland N. Ibbett, Lau...