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ISQED
2002
IEEE
203views Hardware» more  ISQED 2002»
14 years 14 days ago
Automatic Test Program Generation from RT-Level Microprocessor Descriptions
The paper addresses the issue of microprocessor and microcontroller testing, and follows an approach based on the generation of a test program. The proposed method relies on two p...
Fulvio Corno, Gianluca Cumani, Matteo Sonza Reorda...
IPPS
2007
IEEE
14 years 1 months ago
Formal Analysis for Debugging and Performance Optimization of MPI
High-end computing is universally recognized to be a strategic tool for leadership in science and technology. A significant portion of high-end computing is conducted on clusters...
Ganesh Gopalakrishnan, Robert M. Kirby
PPL
2002
108views more  PPL 2002»
13 years 7 months ago
An Efficient Implementation of the BSP Programming Library for VIA
Virtual Interface Architecture(VIA) is a light-weight protocol for protected user-level zero-copy communication. In spite of the promised high performance of VIA, previous MPI imp...
Yang-Suk Kee, Soonhoi Ha
IJCAI
1989
13 years 8 months ago
Simulating Student Programmers
A cognitive model of student programmers is presented. The model is based on protocol studies of students writing Pascal programs, and is implemented in a computer simulation prog...
James C. Spohrer, Elliot Soloway
FPL
1997
Springer
123views Hardware» more  FPL 1997»
13 years 11 months ago
P4: A platform for FPGA implementation of protocol boosters
Protocol Boosters are functional elements, inserted anddeleted fromnetwork protocol stacks on an as-neededbasis. The Protocol Booster design methodology attempts to improve end-to-...
Ilija Hadzic, Jonathan M. Smith