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» Performance of Hardware Compressed Main Memory
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MICRO
2006
IEEE
132views Hardware» more  MICRO 2006»
14 years 2 months ago
Scalable Cache Miss Handling for High Memory-Level Parallelism
Recently-proposed processor microarchitectures for high Memory Level Parallelism (MLP) promise substantial performance gains. Unfortunately, current cache hierarchies have Miss-Ha...
James Tuck, Luis Ceze, Josep Torrellas
HPCA
1998
IEEE
14 years 11 days ago
Performance Study of a Concurrent Multithreaded Processor
The performance of a concurrent multithreaded architectural model, called superthreading 15 , is studied in this paper. It tries to integrate optimizing compilation techniques and...
Jenn-Yuan Tsai, Zhenzhen Jiang, Eric Ness, Pen-Chu...
IPPS
2010
IEEE
13 years 6 months ago
Scalable multi-pipeline architecture for high performance multi-pattern string matching
Multi-pattern string matching remains a major performance bottleneck in network intrusion detection and anti-virus systems for high-speed deep packet inspection (DPI). Although Aho...
Weirong Jiang, Yi-Hua Edward Yang, Viktor K. Prasa...
DEXAW
1997
IEEE
86views Database» more  DEXAW 1997»
14 years 9 days ago
Log-Only Temporal Object Storage
As main memory capacity increases, more of the database read requests will be satis ed from the bu er system. Consequently, the amount of disk write operations relative to disk re...
Kjetil Nørvåg, Kjell Bratbergsengen
MICRO
2007
IEEE
184views Hardware» more  MICRO 2007»
14 years 2 months ago
Data Access Partitioning for Fine-grain Parallelism on Multicore Architectures
The recent design shift towards multicore processors has spawned a significant amount of research in the area of program parallelization. The future abundance of cores on a singl...
Michael L. Chu, Rajiv A. Ravindran, Scott A. Mahlk...