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» Performance of Hardware Compressed Main Memory
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CSE
2009
IEEE
13 years 11 months ago
A Comparative Study of Blocking Storage Methods for Sparse Matrices on Multicore Architectures
Sparse Matrix-Vector multiplication (SpMV) is a very challenging computational kernel, since its performance depends greatly on both the input matrix and the underlying architectur...
Vasileios Karakasis, Georgios I. Goumas, Nectarios...
DATE
2005
IEEE
118views Hardware» more  DATE 2005»
14 years 1 months ago
An Iterative Algorithm for Battery-Aware Task Scheduling on Portable Computing Platforms
In this work we consider battery powered portable systems which either have Field Programmable Gate Arrays (FPGA) or voltage and frequency scalable processors as their main proces...
Jawad Khan, Ranga Vemuri
CVPR
2005
IEEE
14 years 10 months ago
Rank-R Approximation of Tensors: Using Image-as-Matrix Representation
We present a novel multilinear algebra based approach for reduced dimensionality representation of image ensembles. We treat an image as a matrix, instead of a vector as in tradit...
Hongcheng Wang, Narendra Ahuja
MICRO
2002
IEEE
131views Hardware» more  MICRO 2002»
14 years 1 months ago
Pointer cache assisted prefetching
Data prefetching effectively reduces the negative effects of long load latencies on the performance of modern processors. Hardware prefetchers employ hardware structures to predic...
Jamison D. Collins, Suleyman Sair, Brad Calder, De...
CSC
2006
13 years 9 months ago
Applying Sparse Matrix Solvers to a Glacial Ice Sheet Model
- Two software packages for solving sparse systems of linear equations, SuperLU and UMFPACK, have been integrated with the University of Maine Ice Sheet Model for predicting the fo...
Rodney Jacobs, James Fastook, Aitbala Sargent