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» Performance of an ATM Switch: Simulation Study
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GLOBECOM
2006
IEEE
14 years 1 months ago
Interleaved Multistage Switching Fabrics for Scalable High Performance Routers
As the Internet grows exponentially, scalable high performance routers and switches on backbone are required to provide a large number of ports, higher throughput, lower delay late...
Rongsen He, José G. Delgado-Frias
ICNP
1997
IEEE
13 years 11 months ago
Optimal Feedback Control for ABR Service in ATM
The e cient support of data tra c over ATM networks requires congestion control, whose objectives include maximizing throughput, minimizing switch bu er requirement, and attaining...
Paolo Narváez, Kai-Yeung Siu
ISCAPDCS
2001
13 years 9 months ago
A Study of Parallel Monitoring Algorithm in ATM Network Admission Control
Admission control strategies play an important role in congestion control and in guaranteeing the quality of service in Asynchronous Transfer Mode (ATM) networks. Three categories...
Mansoor Alam, Carl Weisfelder, Min Song
IPPS
1998
IEEE
13 years 11 months ago
Impact of Switch Design on the Application Performance of Cache-Coherent Multiprocessors
In this paper, the effect of switch design on the application performance of cache-coherent non-uniform memory access (CC-NUMA) multiprocessors is studied in detail. Wormhole rout...
Laxmi N. Bhuyan, Hu-Jun Wang, Ravi R. Iyer, Akhile...
3DIC
2009
IEEE
120views Hardware» more  3DIC 2009»
14 years 2 months ago
Physical mapping and performance study of a multi-clock 3-Dimensional Network-on-Chip mesh
—The physical performance of a 3-Dimensional Network-on-Chip (NoC) mesh architecture employing Through Silicon Vias (TSV) for vertical connectivity is investigated with a cycle-a...
Matt Grange, Awet Yemane Weldezion, Dinesh Pamunuw...