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136
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DAC
2004
ACM
16 years 3 months ago
Memory access scheduling and binding considering energy minimization in multi-bank memory systems
Memory-related activity is one of the major sources of energy consumption in embedded systems. Many types of memories used in embedded systems allow multiple operating modes (e.g....
Chun-Gi Lyuh, Taewhan Kim
120
Voted
HOTI
2005
IEEE
15 years 8 months ago
Design of Randomized Multichannel Packet Storage for High Performance Routers
High performance routers require substantial amounts of memory to store packets awaiting transmission, requiring the use of dedicated memory devices with the density and capacity ...
Sailesh Kumar, Patrick Crowley, Jonathan S. Turner
137
Voted
ASPDAC
2005
ACM
102views Hardware» more  ASPDAC 2005»
15 years 4 months ago
A framework for automated and optimized ASIP implementation supporting multiple hardware description languages
— Architecture Description Languages (ADLs) are widely used to perform design space exploration for Application Specific Instruction Set Processors (ASIPs). While the design spa...
Oliver Schliebusch, Anupam Chattopadhyay, David Ka...
ISCA
2010
IEEE
247views Hardware» more  ISCA 2010»
15 years 6 months ago
An integrated GPU power and performance model
GPU architectures are increasingly important in the multi-core era due to their high number of parallel processors. Performance optimization for multi-core processors has been a c...
Sunpyo Hong, Hyesoon Kim
ISLPED
2006
ACM
109views Hardware» more  ISLPED 2006»
15 years 8 months ago
Power reduction of multiple disks using dynamic cache resizing and speed control
This paper presents an energy-conservation method for multiple disks and their cache memory. Our method periodically resizes the cache memory and controls the rotation speeds unde...
Le Cai, Yung-Hsiang Lu