Sciweavers

111 search results - page 1 / 23
» Performance pathologies in hardware transactional memory
Sort
View
ISCA
2007
IEEE
143views Hardware» more  ISCA 2007»
14 years 5 months ago
Performance pathologies in hardware transactional memory
Hardware Transactional Memory (HTM) systems reflect choices from three key design dimensions: conflict detection, version management, and conflict resolution. Previously propos...
Jayaram Bobba, Kevin E. Moore, Haris Volos, Luke Y...
PPOPP
2009
ACM
14 years 11 months ago
Transactional memory with strong atomicity using off-the-shelf memory protection hardware
This paper introduces a new way to provide strong atomicity in an implementation of transactional memory. Strong atomicity lets us offer clear semantics to programs, even if they ...
Martín Abadi, Tim Harris, Mojtaba Mehrara
ISCA
2008
IEEE
165views Hardware» more  ISCA 2008»
14 years 5 months ago
Using Hardware Memory Protection to Build a High-Performance, Strongly-Atomic Hybrid Transactional Memory
We demonstrate how fine-grained memory protection can be used in support of transactional memory systems: first showing how a software transactional memory system (STM) can be m...
Lee Baugh, Naveen Neelakantam, Craig B. Zilles
ISPASS
2010
IEEE
14 years 25 days ago
Understanding transactional memory performance
Abstract—Transactional memory promises to generalize transactional programming to mainstream languages and data structures. The purported benefit of transactions is that they ar...
Donald E. Porter, Emmett Witchel
EUROPAR
2007
Springer
14 years 5 months ago
Hardware Transactional Memory with Operating System Support, HTMOS
Abstract. Hardware Transactional Memory (HTM) gives software developers the opportunity to write parallel programs more easily compared to any previous programming method, and yiel...
Sasa Tomic, Adrián Cristal, Osman S. Unsal,...