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ICCD
2005
IEEE
159views Hardware» more  ICCD 2005»
14 years 1 months ago
Architectural-Level Fault Tolerant Computation in Nanoelectronic Processors
Nanoelectronic devices are expected to have extremely high and variable fault rates; thus future processor architectures based on these unreliable devices need to be built with fa...
Wenjing Rao, Alex Orailoglu, Ramesh Karri
IEEEPACT
2003
IEEE
14 years 25 days ago
The Impact of Resource Partitioning on SMT Processors
Simultaneous multithreading (SMT) increases processor throughput by multiplexing resources among several threads. Despite the commercial availability of SMT processors, several as...
Steven E. Raasch, Steven K. Reinhardt
ICCD
2006
IEEE
97views Hardware» more  ICCD 2006»
14 years 4 months ago
Pesticide: Using SMT Processors to Improve Performance of Pointer Bug Detection
Pointer bugs associated with dynamically-allocated objects resulting in out-of-bounds memory access are an important class of software bugs. Because such bugs cannot be detected e...
Jin-Yi Wang, Yen-Shiang Shue, T. N. Vijaykumar, Sa...
EGC
2005
Springer
14 years 1 months ago
The Design and Implementation of the KOALA Co-allocating Grid Scheduler
In multicluster systems, and more generally, in grids, jobs may require co-allocation, i.e., the simultaneous allocation of resources such as processors and input files in multipl...
Hashim H. Mohamed, Dick H. J. Epema
WSC
1998
13 years 9 months ago
Experiments in Load Migration and Dynamic Load Balancing in SPEEDES
It is well known that the performance of a parallel discreteevent simulation (PDES) depends on the allocation of the workload to processors. In particular, poor performance may be...
Linda F. Wilson, Wei Shen