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CODES
2005
IEEE
14 years 1 months ago
High-level synthesis for large bit-width multipliers on FPGAs: a case study
In this paper, we present the analysis, design and implementation of an estimator to realize large bit width unsigned integer multiplier units. Larger multiplier units are require...
Gang Quan, James P. Davis, Siddhaveerasharan Devar...
BMCBI
2010
223views more  BMCBI 2010»
13 years 2 months ago
MetNetGE: interactive views of biological networks and ontologies
Background: Linking high-throughput experimental data with biological networks is a key step for understanding complex biological systems. Currently, visualization tools for large...
Ming Jia, Suh-Yeon Choi, Dirk Reiners, Eve Syrkin ...
ISPD
2004
ACM
97views Hardware» more  ISPD 2004»
14 years 26 days ago
Implementation and extensibility of an analytic placer
Automated cell placement is a critical problem in VLSI physical design. New analytical placement methods that simultaneously spread cells and optimize wirelength have recently rec...
Andrew B. Kahng, Qinke Wang
FPL
2005
Springer
137views Hardware» more  FPL 2005»
14 years 29 days ago
Bitwise Optimised CAM for Network Intrusion Detection Systems
String pattern matching is a computationally expensive task, and when implemented in hardware, it can consume a large amount of resources for processing and storage. This paper pr...
Sherif Yusuf, Wayne Luk
PRICAI
2004
Springer
14 years 23 days ago
A Multi-strategy Approach for Catalog Integration
When we have a large amount of information, we usually use categories with a hierarchy, in which all information is assigned. This paper proposes a new method of integrating two ca...
Ryutaro Ichise, Masahiro Hamasaki, Hideaki Takeda