The efficient design of multiplierless implementa- The goal is to find the optimal sub-expressions across all N dot tions of constant matrix multipliers is challenged by the huge p...
Abstract. This paper argues that flatness appears as a central notion in the verification of counter automata. A counter automaton is called flat when its control graph can be ...
– We present the design of an all-accelerometer inertial measurement unit (IMU). The IMU forms part of an intelligent hand-held microsurgical instrument that senses its own motio...
Wei Tech Ang, Pradeep K. Khosla, Cameron N. Rivier...
To truly exploit FPGAs for rapid turn-around development and prototyping, placement times must be reduced to seconds; latebound, reconfigurable computing applications may demand p...
Spatially-tiled architectures, such as Coarse-Grained Reconfigurable Arrays (CGRAs), are powerful architectures for accelerating applications in the digital-signal processing, em...
Brian Van Essen, Aaron Wood, Allan Carroll, Stephe...