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CODES
2000
IEEE
14 years 6 days ago
Memory architecture for efficient utilization of SDRAM: a case study of the computation/memory access trade-off
This paper discusses the trade-off between calculations and memory accesses in a 3D graphics tile renderer for visualization of data from medical scanners. The performance require...
Thomas Gleerup, Hans Holten-Lund, Jan Madsen, Stee...
DATE
2007
IEEE
105views Hardware» more  DATE 2007»
14 years 2 months ago
Scratchpad memories vs locked caches in hard real-time systems: a quantitative comparison
We propose in this paper an algorithm for off-line selection of the contents of on-chip memories. The algorithm supports two types of on-chip memories, namely locked caches and sc...
Isabelle Puaut, Christophe Pais
ICOIN
2003
Springer
14 years 29 days ago
Scalable IP Routing Lookup in Next Generation Network
Ternary content-addressable memory has been widely used to perform fast routing lookups. It is able to accomplish the best matching prefix problem in O(1) time without considering...
Chia-Tai Chan, Pi-Chung Wang, Shuo-Cheng Hu, Chung...
ISCA
2003
IEEE
88views Hardware» more  ISCA 2003»
14 years 1 months ago
Phase Tracking and Prediction
In a single second a modern processor can execute billions of instructions. Obtaining a bird’s eye view of the behavior of a program at these speeds can be a difficult task whe...
Timothy Sherwood, Suleyman Sair, Brad Calder
ANCS
2007
ACM
13 years 11 months ago
Optimization of pattern matching algorithm for memory based architecture
Due to the advantages of easy re-configurability and scalability, the memory-based string matching architecture is widely adopted by network intrusion detection systems (NIDS). In...
Cheng-Hung Lin, Yu-Tang Tai, Shih-Chieh Chang