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DSN
2009
IEEE
14 years 20 days ago
Processor reliability enhancement through compiler-directed register file peak temperature reduction
Each semiconductor technology generation brings us closer to the imminent processor architecture heat wall, with all its associated adverse effects on system performance and reliab...
Chengmo Yang, Alex Orailoglu
EMSOFT
2010
Springer
13 years 6 months ago
A unifying view of loosely time-triggered architectures
Abstract--Cyber-Physical Systems require distributed architectures to support safety critical real-time control. Kopetz' Time-Triggered Architectures (TTA) have been proposed ...
Albert Benveniste, Anne Bouillard, Paul Caspi
IPPS
2006
IEEE
14 years 2 months ago
An overview of data aggregation architecture for real-time tracking with sensor networks
Abstract— Since sensor nodes normally have limited resources in terms of energy, bandwidth and computation capability, efficiency is a key design goal in sensor network research...
Tian He, Lin Gu, Liqian Luo, Ting Yan, John A. Sta...
ISCA
2006
IEEE
92views Hardware» more  ISCA 2006»
13 years 8 months ago
Quantum Memory Hierarchies: Efficient Designs to Match Available Parallelism in Quantum Computing
The assumption of maximum parallelism support for the successful realization of scalable quantum computers has led to homogeneous, "sea-of-qubits" architectures. The res...
Darshan D. Thaker, Tzvetan S. Metodi, Andrew W. Cr...
OSDI
2008
ACM
14 years 9 months ago
SR-IOV Networking in Xen: Architecture, Design and Implementation
SR-IOV capable network devices offer the benefits of direct I/O throughput and reduced CPU utilization while greatly increasing the scalability and sharing capabilities of the devi...
Yaozu Dong, Zhao Yu, Greg Rose