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DATE
2008
IEEE
101views Hardware» more  DATE 2008»
14 years 2 months ago
Resilient Dynamic Power Management under Uncertainty
With the increasing levels of variability and randomness in the characteristics and behavior of manufactured nanoscale structures and devices, achieving performance optimization u...
Hwisung Jung, Massoud Pedram
ASPDAC
2005
ACM
97views Hardware» more  ASPDAC 2005»
14 years 2 months ago
Opportunities and challenges for better than worst-case design
The progressive trend of fabrication technologies towards the nanometer regime has created a number of new physical design challenges for computer architects. Design complexity, u...
Todd M. Austin, Valeria Bertacco, David Blaauw, Tr...
GLVLSI
2006
IEEE
143views VLSI» more  GLVLSI 2006»
14 years 2 months ago
SACI: statistical static timing analysis of coupled interconnects
Process technology and environment-induced variability of gates and wires in VLSI circuits make timing analyses of such circuits a challenging task. Process variation can have a s...
Hanif Fatemi, Soroush Abbaspour, Massoud Pedram, A...
DAC
2000
ACM
14 years 9 months ago
Code compression for low power embedded system design
erse approaches at all levels of abstraction starting from the physical level up to the system level. Experience shows that a highlevel method may have a larger impact since the de...
Haris Lekatsas, Jörg Henkel, Wayne Wolf
ICCAD
2006
IEEE
124views Hardware» more  ICCAD 2006»
14 years 5 months ago
Robust system level design with analog platforms
An approach to robust system level mixed signal design is presented based on analog platforms. The bottom-up characterization phase of platform components provides accurate perfor...
Fernando De Bernardinis, Pierluigi Nuzzo, Alberto ...